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ISLPED
2007
ACM
84views Hardware» more  ISLPED 2007»
13 years 9 months ago
Towards a software approach to mitigate voltage emergencies
Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. One a...
Meeta Sharma Gupta, Krishna K. Rangan, Michael D. ...
CAINE
2007
13 years 9 months ago
Tracking Compounds and Their Interactions within In Silico Liver
We present multi-scale tracking features for the In Silico Liver (ISL) and their simulation results. The features were developed to support tracking of dynamic pharmacokinetic/pha...
Sunwoo Park, Sean H. J. Kim, Glen E. P. Ropella, C...
TVLSI
2008
152views more  TVLSI 2008»
13 years 7 months ago
MMV: A Metamodeling Based Microprocessor Validation Environment
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Di...
SOSP
2009
ACM
14 years 4 months ago
Better I/O through byte-addressable, persistent memory
Modern computer systems have been built around the assumption that persistent storage is accessed via a slow, block-based interface. However, new byte-addressable, persistent memo...
Jeremy Condit, Edmund B. Nightingale, Christopher ...
ISCA
2006
IEEE
125views Hardware» more  ISCA 2006»
14 years 1 months ago
Architectural Semantics for Practical Transactional Memory
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
Austen McDonald, JaeWoong Chung, Brian D. Carlstro...