The performance of superscalar processors is more sensitive to the memory system delay than their single-issue predecessors. This paper examines alternative data access microarchi...
William Y. Chen, Scott A. Mahlke, Pohua P. Chang, ...
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. ...
Growing on-chip wire delays will cause many future microarchitectures to be distributed, in which hardware resources within a single processor become nodes on one or more switched...
Productivity data for IC designs indicates an exponential increase in design time and cost with the number of elements that are to be included in a device. Present applications re...
Douglas Densmore, Sanjay Rekhi, Alberto L. Sangiov...
Continued advancements in fabrication technology and reductions in feature size create challenges in maintaining both manufacturing yield rates and long-term reliability of device...
Premkishore Shivakumar, Stephen W. Keckler, Charle...