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» PPM Reduction on Embedded Memories in System on Chip
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VLSID
2009
IEEE
170views VLSI» more  VLSID 2009»
14 years 8 months ago
Code Transformations for TLB Power Reduction
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivasta...
CODES
2005
IEEE
14 years 1 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
DAC
2006
ACM
14 years 1 months ago
Buffer memory optimization for video codec application modeled in Simulink
Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and cont...
Sang-Il Han, Xavier Guerin, Soo-Ik Chae, Ahmed Ami...
CGO
2007
IEEE
14 years 1 months ago
Code Compaction of an Operating System Kernel
General-purpose operating systems, such as Linux, are increasingly being used in embedded systems. Computational resources are usually limited, and embedded processors often have ...
Haifeng He, John Trimble, Somu Perianayagam, Saumy...
ECRTS
2008
IEEE
14 years 2 months ago
Temporal Analysis for Adapting Concurrent Applications to Embedded Systems
Embedded services and applications that interact with the real world often, over time, need to run on different kinds of hardware (low-cost microcontrollers to powerful multicore ...
Sibin Mohan, Johannes Helander