230 search results - page 40 / 46 » PPM Reduction on Embedded Memories in System on Chip |
MICRO
2008
IEEE
14 years 1 months ago
2008
IEEE
Scaling of CMOS feature size has long been a source of dramatic performance gains. However, the reduction in voltage levels has not been able to match this rate of scaling, leadin...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
EUC
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. When flash memory is used as a storage in embedded systems, block level translation layer is required between conventional filesystem and flash memory chips due to its ph...
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Scratch-pad memory is becoming an important fixture in embedded multimedia systems. It is significantly more efficient than the cache, in performance and power, and has the add...