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DATE
2002
IEEE
84views Hardware» more  DATE 2002»
14 years 19 days ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...
ICCD
2005
IEEE
246views Hardware» more  ICCD 2005»
14 years 4 months ago
H-SIMD Machine: Configurable Parallel Computing for Matrix Multiplication
FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of dataintensive applications [1, 2]. However, mapping algorithms onto multimillion-...
Xizhen Xu, Sotirios G. Ziavras
HIPC
2007
Springer
14 years 1 months ago
Molecular Dynamics Simulations on Commodity GPUs with CUDA
Molecular dynamics simulations are a common and often repeated task in molecular biology. The need for speeding up this treatment comes from the requirement for large system simula...
Weiguo Liu, Bertil Schmidt, Gerrit Voss, Wolfgang ...
3DPVT
2006
IEEE
176views Visualization» more  3DPVT 2006»
14 years 1 months ago
Belief Propagation for Panorama Generation
We present an algorithm for generating panoramic images of complex scenes from a multi-sensor camera. We further present a programmable graphics hardware implementation to process...
Alan Brunton, Chang Shu
DATE
2010
IEEE
184views Hardware» more  DATE 2010»
14 years 23 days ago
Parallel subdivision surface rendering and animation on the Cell BE processor
—Subdivision Surfaces provide a compact way to describe a smooth surface using a mesh model. They are widely used in 3D animation and nearly all modern modeling programs support ...
R. Grottesi, S. Morigi, Martino Ruggiero, Luca Ben...