833 search results - page 102 / 167 » Parallel Processing Architectures for Reconfigurable Systems |
VLSID
2001
IEEE
14 years 9 months ago
2001
IEEE
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
IPPS
2008
IEEE
14 years 3 months ago
2008
IEEE
MPI Alltoall is one of the most communication intense collective operation used in many parallel applications. Recently, the supercomputing arena has witnessed phenomenal growth o...
HPDC
2000
IEEE
14 years 1 months ago
2000
IEEE
A new RAID-x (redundant array of inexpensive disks at level x) architecture is presented for distributed I/O processing on a serverless cluster of computers. The RAID-x architectu...
DAC
1999
ACM
14 years 1 months ago
1999
ACM
ion model or flexible PCB solutions cannot offer a valid solution for the next millinium SoCs . James G. Dougherty, Integrated Systems Silicon LTD, Belfast, Northern Ireland ISS an...
CDES
2010
13 years 7 months ago
2010
This paper describes the design of a delay-insensitive (DI) Cell Matrix. This architecture allows for massively parallel, self-determined operation and can be used to implement reg...