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» Parallelism through Digital Circuit Design
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ICCAD
2002
IEEE
107views Hardware» more  ICCAD 2002»
14 years 4 months ago
Theoretical and practical validation of combined BEM/FEM substrate resistance modeling
In mixed-signal designs, substrate noise originating from the digital part can seriously influence the functionality of the analog part. As such, accurately modeling the properti...
Eelco Schrik, Patrick Dewilde, N. P. van der Meijs
DCAI
2008
13 years 9 months ago
The Intelligent Butler: A Virtual Agent for Disabled and Elderly People Assistance
Abstract. Social assistance constitutes an increasing problem in developed countries, which can be considered from two dimensions: the home and the hospital frameworks. Anyway, mos...
Gabriel Fiol-Roig, Diana Arellano, Francisco J. Pe...
GLVLSI
2003
IEEE
173views VLSI» more  GLVLSI 2003»
14 years 26 days ago
40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...
Michael I. Fuller, James P. Mabry, John A. Hossack...
ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
14 years 4 months ago
Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
Abhishek Singh, Jitin Tharian, Jim Plusquellic
FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
14 years 1 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna