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» Parallelism through Digital Circuit Design
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DAC
2002
ACM
14 years 8 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik
SBCCI
2006
ACM
171views VLSI» more  SBCCI 2006»
14 years 1 months ago
Asynchronous circuit design on reconfigurable devices
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
R. U. R. Mocho, G. H. Sartori, Renato P. Ribas, An...
CORR
2011
Springer
151views Education» more  CORR 2011»
13 years 2 months ago
A Simulation Experiment on a Built-In Self Test Equipped with Pseudorandom Test Pattern Generator and Multi-Input Shift Register
This paper investigates the impact of the changes of the characteristic polynomials and initial loadings, on behaviour of aliasing errors of parallel signature analyzer (Multi-Inp...
A. Ahmad
ICCAD
2008
IEEE
246views Hardware» more  ICCAD 2008»
14 years 4 months ago
Integrated circuit design with NEM relays
—To overcome the energy-efficiency limitations imposed by finite sub-threshold slope in CMOS transistors, this paper explores the design of integrated circuits based on nanoelect...
Fred Chen, Hei Kam, Dejan Markovic, Tsu-Jae King L...
CODES
2005
IEEE
14 years 1 months ago
System-level design automation tools for digital microfluidic biochips
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
Krishnendu Chakrabarty, Fei Su