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DAC
2005
ACM
14 years 8 months ago
Low power network processor design using clock gating
Abstract-- Network processors (NPs) have emerged as successful platforms to providing both high performance and flexibility in building powerful routers. Typical NPs incorporate mu...
Jia Yu, Jun Yang 0002, Laxmi N. Bhuyan, Yan Luo
ISORC
2008
IEEE
14 years 1 months ago
Hardware Objects for Java
Java, as a safe and platform independent language, avoids access to low-level I/O devices or direct memory access. In standard Java, low-level I/O it not a concern; it is handled ...
Martin Schoeberl, Christian Thalinger, Stephan Kor...
ASAP
2007
IEEE
134views Hardware» more  ASAP 2007»
14 years 1 months ago
Real-time FPGA-implementation for blue-sky Detection
Currently, television sets with flat plasma and LCD screens with improved resolutions and better color quality are emerging. To fully utilize their capabilities, lower resolution...
Nhut Thanh Quach, Bahman Zafarifar, Georgi Gaydadj...
DATE
2010
IEEE
182views Hardware» more  DATE 2010»
14 years 12 days ago
DAGS: Distribution agnostic sequential Monte Carlo scheme for task execution time estimation
This paper addresses the problem of stochastic task execution time estimation agnostic to the process distributions. The proposed method is orthogonal to the application structure ...
Nabeel Iqbal, M. A. Siddique, Jörg Henkel
BMCBI
2007
203views more  BMCBI 2007»
13 years 7 months ago
A Grid-based solution for management and analysis of microarrays in distributed experiments
Several systems have been presented in the last years in order to manage the complexity of large microarray experiments. Although good results have been achieved, most systems ten...
Ivan Porro, Livia Torterolo, Luca Corradi, Marco F...