149 search results - page 8 / 30 » Parametric Fault Simulation and Test Vector Generation |
ATS
1998
IEEE
13 years 11 months ago
1998
IEEE
We propose a new static test set compaction method based on a careful examination of attributes of fault coverage curves. Our method is based on two key ideas: 1 fault-list and te...
VLSID
2006
IEEE
14 years 1 months ago
2006
IEEE
The main result of this paper, proved as a theorem, is that a lower bound on the number of test vectors that detect each fault at least N times is N
VTS
1998
IEEE
13 years 11 months ago
1998
IEEE
This paper presents simulation evidence supporting the use of bit transition maximization techniques in the design of hardware test pattern generators TPGs. Bit transition maximiz...
EURODAC
1995
IEEE
13 years 11 months ago
1995
IEEE
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...
DFT
2003
IEEE
14 years 20 days ago
2003
IEEE
In this paper, we propose a new concept of testing only functionally testable transition faults in Broadside Transition testing via a novel constrained ATPG. For each functionally...