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DAC
2012
ACM
12 years 21 days ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu
DAC
2012
ACM
12 years 21 days ago
Chisel: constructing hardware in a Scala embedded language
In this paper we introduce Chisel, a new hardware construction language that supports advanced hardware design using highly parameterized generators and layered domain-specific h...
Jonathan Bachrach, Huy Vo, Brian Richards, Yunsup ...
TFM
2009
Springer
252views Formal Methods» more  TFM 2009»
14 years 4 months ago
Abstraction and Modelling: A Complementary Partnership
action and Modelling - a complementary partnership” 10h30 – 11h 00 Coffee break 11h-12h30 Session 1 “Model Transformation: Foundations” Algebraic models for bidirectional m...
Jeffrey Kramer
DATE
1998
IEEE
153views Hardware» more  DATE 1998»
14 years 2 months ago
An Energy-Conscious Exploration Methodology for Reconfigurable DSPs
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
Jan M. Rabaey, Marlene Wan
JELIA
1990
Springer
14 years 2 months ago
Semantic Interpretation as Higher-Order Deduction
Traditional accounts of the semantic interpretation of quantified phrases and its interaction with reference and ellipsis have relied on formal manipulations of logical forms (qua...
Fernando C. N. Pereira