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» Partitioning of VLSI Circuits and Systems
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ISLPED
2003
ACM
85views Hardware» more  ISLPED 2003»
14 years 20 days ago
Energy recovery clocking scheme and flip-flops for ultra low-energy applications
A significant fraction of the total power in highly synchronous systems is dissipated over clock networks. Hence, low-power clocking schemes would be promising approaches for futu...
Matthew Cooke, Hamid Mahmoodi-Meimand, Kaushik Roy
ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
13 years 11 months ago
Repeater insertion in RLC lines for minimum propagation delay
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
Yehea I. Ismail, Eby G. Friedman
CVPR
2009
IEEE
1468views Computer Vision» more  CVPR 2009»
15 years 2 months ago
Hardware-Efficient Belief Propagation
Belief propagation (BP) is an effective algorithm for solving energy minimization problems in computer vision. However, it requires enormous memory, bandwidth, and computation beca...
Chao-Chung Cheng, Chia-Kai Liang, Homer H. Chen, L...
SBCCI
2005
ACM
114views VLSI» more  SBCCI 2005»
14 years 29 days ago
Traffic generation and performance evaluation for mesh-based NoCs
The designer of a system on a chip (SoC) that connects IP cores through a network on chip (NoC) needs methods to support application performance evaluation. Two key aspects these ...
Leonel Tedesco, Aline Mello, Diego Garibotti, Ney ...
FCCM
1999
IEEE
134views VLSI» more  FCCM 1999»
13 years 11 months ago
Runlength Compression Techniques for FPGA Configurations
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
Scott Hauck, William D. Wilson