2487 search results - page 439 / 498 » Partitions of Graphs into Trees |
ICCAD
2000
IEEE
14 years 14 days ago
2000
IEEE
–An FPGA switch box is said to be hyper-universal if it is routable for all possible surrounding multi-pin net topologies satisfying the routing resource constraints. It is desir...
DATE
1999
IEEE
14 years 12 days ago
1999
IEEE
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
ITC
1999
IEEE
14 years 11 days ago
1999
IEEE
A high-level built-in self-test (BIST) synthesis involves several tasks such as system register assignment, interconnection assignment, and BIST register assignment. Existing high...
ASYNC
1998
IEEE
14 years 10 days ago
1998
IEEE
We present the XDI Model for specifying delay-insensitive circuits, that is, reactive systems that correctly exchange signals with their environment in spite of unknown delays inc...
SPAA
1998
ACM
14 years 9 days ago
1998
ACM
Sparse LU factorization with partial pivoting is important for many scienti c applications and delivering high performance for this problem is di cult on distributed memory machin...