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DATE
2004
IEEE
152views Hardware» more  DATE 2004»
14 years 15 days ago
A Design Methodology for the Exploitation of High Level Communication Synthesis
In this paper we analyse some methodological concerns that have to be faced in a design flow which contains automatic synthesis phases from high-level, system descriptions. In par...
Francesco Bruschi, Massimo Bombana
CASES
2001
ACM
14 years 12 days ago
A system-on-a-chip lock cache with task preemption support
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...
Bilge Saglam Akgul, Jaehwan Lee, Vincent John Moon...
ESA
1998
Springer
162views Algorithms» more  ESA 1998»
14 years 11 days ago
External Memory Algorithms
Abstract. Data sets in large applications are often too massive to t completely inside the computer's internal memory. The resulting input output communication or I O between ...
Jeffrey Scott Vitter
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
14 years 9 days ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah
MOBISYS
2010
ACM
13 years 11 months ago
On the limits of effective hybrid micro-energy harvesting on mobile CRFID sensors
Mobile sensing is difficult without power. Emerging Computational RFIDs (CRFIDs) provide both sensing and generalpurpose computation without batteries--instead relying on small ca...
Jeremy Gummeson, Shane S. Clark, Kevin Fu, Deepak ...
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