260 search results - page 38 / 52 » Performance Modelling and Optimization of Memory Access on C... |
ISNN
2005
Springer
14 years 1 months ago
2005
Springer
Abstract. Artificial Neural Networks (ANNs) and image processing requires massively parallel computation of simple operator accompanied by heavy memory access. Thus, this type of ...
TVLSI
2010
13 years 2 months ago
2010
This paper proposes a low-power high-throughput digital signal processor (DSP) for baseband processing in wireless terminals. It builds on our earlier architecture--Signal processi...
IEEEPACT
2009
IEEE
14 years 2 months ago
2009
IEEE
—Analytical models have been used to estimate optimal values for parameters such as tile sizes in the context of loop nests. However, important algorithms such as fast Fourier tr...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
IPPS
2000
IEEE
14 years 16 hour ago
2000
IEEE
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...