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» Performance Optimization and Evaluation for Linear Codes
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DATE
2006
IEEE
90views Hardware» more  DATE 2006»
14 years 3 months ago
Microarchitectural floorplanning under performance and thermal tradeoff
— In this paper, we present the first multi-objective microarchitectural floorplanning algorithm for designing highperformance, high-reliability processors in the early design ...
Michael B. Healy, Mario Vittes, Mongkol Ekpanyapon...
ASPLOS
2010
ACM
14 years 3 months ago
A real system evaluation of hardware atomicity for software speculation
In this paper we evaluate the atomic region compiler abstraction by incorporating it into a commercial system. We find that atomic regions are simple and intuitive to integrate i...
Naveen Neelakantam, David R. Ditzel, Craig B. Zill...
ASPDAC
2007
ACM
117views Hardware» more  ASPDAC 2007»
14 years 1 months ago
Short-Circuit Compiler Transformation: Optimizing Conditional Blocks
Abstract-- We present the short-circuit code transformation technique, intended for embedded compilers. The transformation technique optimizes conditional blocks in high-level prog...
Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau
IEEEINTERACT
2002
IEEE
14 years 2 months ago
Code Cache Management Schemes for Dynamic Optimizers
A dynamic optimizer is a software-based system that performs code modifications at runtime, and several such systems have been proposed over the past several years. These systems ...
Kim M. Hazelwood, Michael D. Smith
ICASSP
2011
IEEE
13 years 28 days ago
How many known symbols are required for linear channel estimation in OFDM?
Training sequences for estimation of channel parameters have been well designed under the condition that the number of the unknown channel parameters is not greater than the numbe...
Shuichi Ohno, Emmanuel Manasseh, Masayoshi Nakamot...