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» Performance Prediction of a Parallel Simulator
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140
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TECS
2008
122views more  TECS 2008»
15 years 2 months ago
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling
tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...
Gunar Schirner, Rainer Dömer
129
Voted
HPDC
2009
IEEE
15 years 9 months ago
Exploring data reliability tradeoffs in replicated storage systems
This paper explores the feasibility of a cost-efficient storage architecture that offers the reliability and access performance characteristics of a high-end system. This architec...
Abdullah Gharaibeh, Matei Ripeanu
CODES
2005
IEEE
15 years 8 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
132
Voted
IPPS
2008
IEEE
15 years 9 months ago
Sweep coverage with mobile sensors
Many efforts have been made for addressing coverage problems in sensor networks. They fall into two categories, full coverage and barrier coverage, featured as static coverage. In...
Wei-Fang Cheng, Mo Li, Kebin Liu, Yunhao Liu, Xian...
120
Voted
IPPS
2005
IEEE
15 years 8 months ago
Security-Driven Heuristics and A Fast Genetic Algorithm for Trusted Grid Job Scheduling
In this paper, our contributions are two-fold: First, we enhance the Min-Min and Sufferage heuristics under three risk modes driven by security concerns. Second, we propose a new ...
Shanshan Song, Yu-Kwong Kwok, Kai Hwang