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ISCA
2011
IEEE
258views Hardware» more  ISCA 2011»
13 years 15 days ago
A case for heterogeneous on-chip interconnects for CMPs
Network-on-chip (NoC) has become a critical shared resource in the emerging Chip Multiprocessor (CMP) era. Most prior NoC designs have used the same type of router across the enti...
Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. ...
MOBICOM
2009
ACM
14 years 3 months ago
A scalable micro wireless interconnect structure for CMPs
This paper describes an unconventional way to apply wireless networking in emerging technologies. It makes the case for using a two-tier hybrid wireless/wired architecture to inte...
Suk-Bok Lee, Sai-Wang Tam, Ioannis Pefkianakis, So...
IEEEPACT
2008
IEEE
14 years 3 months ago
Distributed cooperative caching
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...
Enric Herrero, José González, Ramon ...
HPCA
2009
IEEE
14 years 9 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
ISCA
1998
IEEE
108views Hardware» more  ISCA 1998»
14 years 1 months ago
Pipeline Gating: Speculation Control for Energy Reduction
Branch prediction has enabled microprocessors to increase instruction level parallelism (ILP) by allowing programs to speculatively execute beyond control boundaries. Although spe...
Srilatha Manne, Artur Klauser, Dirk Grunwald