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RTAS
2007
IEEE
14 years 2 months ago
Performance Debugging of Real-Time Systems Using Multicriteria Schedulability Analysis
Most of today’s real-time embedded systems consist of a heterogeneous mix of fully-programmable processors, fixed-function components or hardware accelerators, and partially-pr...
Unmesh D. Bordoloi, Samarjit Chakraborty
DATE
2007
IEEE
88views Hardware» more  DATE 2007»
14 years 2 months ago
Trade-off design of analog circuits using goal attainment and "Wave Front" sequential quadratic programming
One of the main tasks in analog design is the sizing of the circuit parameters, such as transistor lengths and widths, in order to obtain optimal circuit performances, such as hig...
Daniel Mueller, Helmut E. Graeb, Ulf Schlichtmann
HPCA
2008
IEEE
14 years 3 months ago
Speculative instruction validation for performance-reliability trade-off
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal
ASPDAC
2004
ACM
75views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Power-performance trade-off using pipeline delays
— We study the delays faced by instructions in the pipeline of a superscalar processor and its impact on power and performance. Instructions that are ready-on-dispatch (ROD) are ...
G. Surendra, Subhasis Banerjee, S. K. Nandy
SACRYPT
2000
Springer
118views Cryptology» more  SACRYPT 2000»
14 years 2 days ago
Attacks on Additive Encryption of Redundant Plaintext and Implications on Internet Security
We present and analyze attacks on additive stream ciphers that rely on linear equations that hold with non-trivial probability in plaintexts that are encrypted using distinct keys....
David A. McGrew, Scott R. Fluhrer