618 search results - page 84 / 124 » Performance and energy optimization of concurrent pipelined ... |
SBACPAD
2005
IEEE
14 years 2 months ago
2005
IEEE
Complexity is one of the most important problems facing microarchitects. It is exacerbated by the application of optimizations, by scaling to higher issue widths and, in general, ...
DAC
2004
ACM
14 years 10 months ago
2004
ACM
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
FPGA
2009
ACM
14 years 3 months ago
2009
ACM
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
ESTIMEDIA
2004
Springer
14 years 2 months ago
2004
Springer
We present an evaluation strategy for clock synchronization algorithms. It is based on a combination of measured traces, which provide for realistic performance estimation, and of...
ISLPED
2005
ACM
14 years 2 months ago
2005
ACM
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...