We present a framework (Real-Time Calculus) for analysing various system properties pertaining to timing analysis, loads on various components and on-chip buffer memory requiremen...
The increasing popularity of heterogeneous Webenabled devices and wired/wireless connections motivates the diffusion of content adaptation services that enrich the traditional Web...
Performance-asymmetric multi-cores consist of heterogeneous cores, which support the same ISA, but have different computing capabilities. To maximize the throughput of asymmetric...
Youngjin Kwon, Changdae Kim, Seungryoul Maeng, Jae...
Software infrastructures and applications more and more must deal with data available in a variety of different storage engines, accessible through a multitude of protocols and in...
Marc Van Cappellen, Wouter Cordewiner, Carlo Innoc...
Developing a functional prototype of a system-on-chip provides a unifying vehicle for model validation and system refinement. Keeping the prototype executable everal abstraction l...
Alexandre Chureau, Yvon Savaria, El Mostapha Aboul...