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» Performance of Hardware Compressed Main Memory
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DATE
2008
IEEE
155views Hardware» more  DATE 2008»
14 years 2 months ago
Comparison of memory write policies for NoC based Multicore Cache Coherent Systems
The following study shows a direct comparison of memory write policies in Shared Memory Multicore Systems. Although there are much work and many studies about this issue, our work...
Pierre Guironnet de Massas, Frédéric...
TECS
2002
81views more  TECS 2002»
13 years 7 months ago
System-level exploration of association table implementations in telecom network applications
les to further raise the abstraction level of the initial specification, where dynamic data sets can be specified without low-level details. Our method is suited for hardware and s...
Chantal Ykman-Couvreur, J. Lambrecht, A. Van Der T...
IPPS
1999
IEEE
14 years 11 days ago
An Efficient Implementation Method of Fractal Image Compression on Dynamically Reconfigurable Architecture
Abstract. This paper proposes a method for implementing fractal image compression on dynamically reconfigurable architecture. In the encoding of this compression, metric computatio...
Hidehisa Nagano, Akihiro Matsuura, Akira Nagoya
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
14 years 5 months ago
Reliability Support for On-Chip Memories Using Networks-on-Chip
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
Federico Angiolini, David Atienza, Srinivasan Mura...
LCPC
2007
Springer
14 years 2 months ago
Supporting Huge Address Spaces in a Virtual Machine for Java on a Cluster
Abstract. To solve problems that require far more memory than a single machine can supply, data can be swapped to disk in some manner, it can be compressed, and/or the memory of mu...
Ronald Veldema, Michael Philippsen