Embedded processor-based systems allow for the tailoring of the on-chip memory architecture based on application-specific requirements. We present an analytical strategy for explo...
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nico...
Cache misses form a major bottleneck for memory-intensive applications, due to the significant latency of main memory accesses. Loop tiling, in conjunction with other program tran...
Instruction cache aware compilation seeks to lay out a program in memory in such a way that cache conflicts between procedures are minimized. It does this through profile-driven...
This paper focuses on the Cyclops64 computer architecture and presents an analytical model and performance simulation results for the preloading and loop unrolling approaches to op...
Yanwei Niu, Ziang Hu, Kenneth E. Barner, Guang R. ...
Galois field implementations are central to the design of many reliable and secure systems, with many systems implementing them in software. The two most common Galois field opera...
Kevin M. Greenan, Ethan L. Miller, Thomas J. E. Sc...