955 search results - page 13 / 191 » Performance optimization of multiple memory architectures fo... |
DATE
2002
IEEE
14 years 1 months ago
2002
IEEE
: A new technique is presented in this paper to improve the efficiency of data scheduling for multi-context reconfigurable architectures targeting multimedia and DSP applications. ...
FPGA
2004
ACM
14 years 2 months ago
2004
ACM
In this paper, an efficient implementation of a high performance coarse-grain reconfigurable data-path on a mixed-granularity reconfigurable platform is presented. It consists of ...
LCTRTS
2010
Springer
13 years 11 months ago
2010
Springer
DSP processors usually provide dedicated address generation units (AGUs) to assist address computation. By carefully allocating variables in the memory, DSP compilers take advanta...
DAC
2002
ACM
14 years 10 months ago
2002
ACM
3DIC
2009
IEEE
14 years 2 months ago
2009
IEEE
Several forms of processor memory organizations have been in use to optimally access off-chip memory systems mainly the Hard disk drives (HDD). Recent trends show that the solid s...