955 search results - page 9 / 191 » Performance optimization of multiple memory architectures fo... |
TVLSI
2010
13 years 2 months ago
2010
This paper proposes a low-power high-throughput digital signal processor (DSP) for baseband processing in wireless terminals. It builds on our earlier architecture--Signal processi...
CODES
2003
IEEE
14 years 1 months ago
2003
IEEE
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
CC
2008
Springer
13 years 9 months ago
2008
Springer
Heterogeneous multi-core and streaming architectures such as the GPU, Cell, ClearSpeed, and Imagine processors have better power/ performance ratios and memory bandwidth than tradi...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Dynamic Random Access Memory (DRAM) is used as the bulk of the main memory in most computing systems and its energy and power consumption has become a first-class design considera...
ARITH
2001
IEEE
13 years 11 months ago
2001
IEEE
A recently introduced double-base number representation has proved to be successful in optimizing the performance of several algorithms in cryptography and digital signal processi...