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ASAP
2004
IEEE
101views Hardware» more  ASAP 2004»
14 years 13 days ago
Register Organization for Enhanced On-Chip Parallelism
Large register file with multiple ports is a critical component of a high-performance processor. A large number of registers are necessary for processing a larger number of in-fli...
Rama Sangireddy
ISCA
2000
IEEE
93views Hardware» more  ISCA 2000»
14 years 8 days ago
Reconfigurable caches and their application to media processing
High performance general-purpose processors are increasingly being used for a variety of application domains scienti c, engineering, databases, and more recently, media processing...
Parthasarathy Ranganathan, Sarita V. Adve, Norman ...
ICIP
2007
IEEE
14 years 10 months ago
DSP Implementation of Deblocking Filter for AVS
The in-loop deblocking filter contains highly adaptive processing on both sample level and block edge level, which inevitably appears in the loop kernel of the algorithm. Therefor...
Zhigang Yang, Wen Gao, Yan Liu, Debin Zhao
DAC
2009
ACM
14 years 9 months ago
Designing heterogeneous ECU networks via compact architecture encoding and hybrid timing analysis
In this paper, a design method for automotive architectures is proposed. The two main technical contributions are (i) a novel hardware/software architecture encoding that unifies ...
Jürgen Teich, Martin Lukasiewycz, Michael Gla...
DAC
2007
ACM
14 years 9 months ago
The KILL Rule for Multicore
Multicore has shown significant performance and power advantages over single cores in commercial systems with a 2-4 cores. Applying a corollary of Moore's Law for multicore, ...
Anant Agarwal, Markus Levy