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» Performance-complexity analysis in hardware-software codesig...
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CODES
2007
IEEE
14 years 1 months ago
ESL design and HW/SW co-verification of high-end software defined radio platforms
Multiple wireless technologies are converging to run on personal handhelds. The plethora of communication standards next to the cost issues of deeper submicron processing require ...
A. C. H. Ng, J. W. Weijers, Miguel Glassee, Thomas...
CODES
2006
IEEE
14 years 1 months ago
Automatic run-time extraction of communication graphs from multithreaded applications
Embedded system synthesis, multiprocessor synthesis, and thread assignment policy design all require detailed knowledge of the runtime communication patterns among different threa...
Ai-Hsin Liu, Robert P. Dick
CODES
2009
IEEE
14 years 1 months ago
A variation-tolerant scheduler for better than worst-case behavioral synthesis
– There has been a recent shift in design paradigms, with many turning towards yield-driven approaches to synthesize and design systems. A major cause of this shift is the contin...
Jason Cong, Albert Liu, Bin Liu
CODES
2006
IEEE
14 years 1 months ago
Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
Antonis Papanikolaou, T. Grabner, Miguel Miranda, ...
CODES
2003
IEEE
14 years 8 days ago
Early estimation of the size of VHDL projects
The analysis of the amount of human resources required to complete a project is felt as a critical issue in any company of the electronics industry. In particular, early estimatin...
William Fornaciari, Fabio Salice, Daniele Paolo Sc...