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FPL
2010
Springer
124views Hardware» more  FPL 2010»
13 years 5 months ago
Finding System-Level Information and Analyzing Its Correlation to FPGA Placement
One of the more popular placement algorithms for Field Programmable Gate Arrays (FPGAs) is called Simulated Annealing (SA). This algorithm tries to create a good quality placement ...
Farnaz Gharibian, Lesley Shannon, Peter Jamieson
ERSA
2006
113views Hardware» more  ERSA 2006»
13 years 8 months ago
A Sensor Distribution Algorithm for FPGAs with Minimal Dynamic Reconfiguration Overhead
Thermal monitoring of a design plays a vital role to ensure safe and reliable thermal operating conditions. Thermal monitoring by employing thermal sensors is a popular technique ...
Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci...
DAC
2004
ACM
14 years 8 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
DAC
1994
ACM
13 years 11 months ago
Routing in a New 2-Dimensional FPGA/FPIC Routing Architecture
- This paper studies the routing problem for a new Field-Programmable Gate Array (FPGA) and Field-Programmable Interconnect Chip (FPIC) routing architecture which improves upon the...
Yachyang Sun, C. L. Liu
FCCM
2009
IEEE
123views VLSI» more  FCCM 2009»
13 years 11 months ago
Scalable High Throughput and Power Efficient IP-Lookup on FPGA
Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. Due to the available on-chip memory and the number of I/O pins of Field Programmab...
Hoang Le, Viktor K. Prasanna