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» Petascale computing with accelerators
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ASAP
2004
IEEE
123views Hardware» more  ASAP 2004»
14 years 1 months ago
A Packet Scheduling Algorithm for IPSec Multi-Accelerator Based Systems
IPSec is a suite of protocols that adds security to communications at the IP level. Protocols within the IPSec suite make extensive use of cryptographic algorithms. Since these al...
Fabien Castanier, Alberto Ferrante, Vincenzo Piuri
MM
2010
ACM
202views Multimedia» more  MM 2010»
13 years 8 months ago
Accelerated IPTV channel change with transcoded unicast bursting
We study video transcoding for accelerated channel changes in IPTV systems. Video transcoding at the Retransmission Server not only reduces the channel change latency, but also re...
Zhi Li, Ali C. Begen, Xiaoqing Zhu, Bernd Girod
ECCC
2011
203views ECommerce» more  ECCC 2011»
13 years 1 months ago
Accelerated Slide- and LLL-Reduction
Abstract. Given an LLL-basis B of dimension n = hk we accelerate slide-reduction with blocksize k to run under a reasonable assumption within 1 6 n2 h log1+ε α local SVP-computat...
Claus-Peter Schnorr
DAC
2008
ACM
14 years 11 months ago
DVFS in loop accelerators using BLADES
Hardware accelerators are common in embedded systems that have high performance requirements but must still operate within stringent energy constraints. To facilitate short time-t...
Ganesh S. Dasika, Shidhartha Das, Kevin Fan, Scott...
DATE
2009
IEEE
135views Hardware» more  DATE 2009»
14 years 4 months ago
Heterogeneous coarse-grained processing elements: A template architecture for embedded processing acceleration
Reconfigurable Architectures are good candidates for application accelerators that cannot be set in stone at production time. FPGAs however, often suffer from the area and perfor...
Giovanni Ansaloni, Paolo Bonzini, Laura Pozzi