4 search results - page 1 / 1 » Physical-Aware Link Allocation and Route Assignment for Chip... |
NOCS
2010
IEEE
13 years 5 months ago
2010
IEEE
TVLSI
2010
13 years 2 months ago
2010
A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...
ISCAS
2008
IEEE
14 years 1 months ago
2008
IEEE
— A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost and flexible routing capability. To achieve a low area cost, th...
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
Networks-on-Chip (NoC) is emerging as a practical development platform for future systems-on-chip products. We propose an energyefficient static algorithm which optimizes the ener...