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FCCM
2006
IEEE
119views VLSI» more  FCCM 2006»
14 years 2 months ago
Integrating FPGA Acceleration into the Protomol Molecular Dynamics Code: Preliminary Report
: We describe a new pipeline for computing non-bonded forces and its integration into the ProtoMol molecular dynamics (MD) code. There are several innovations: a novel interpolatio...
Yongfeng Gu, Tom Van Court, Martin C. Herbordt
APCSAC
2000
IEEE
14 years 10 days ago
Cost/Performance Tradeoff of n-Select Square Root Implementations
Hardware square-root units require large numbers of gates even for iterative implementations. In this paper, we present four low-cost high-performance fullypipelined n-select impl...
Wanming Chu, Yamin Li
FCCM
2009
IEEE
139views VLSI» more  FCCM 2009»
13 years 5 months ago
Memory-Efficient Pipelined Architecture for Large-Scale String Matching
We propose a pipelined field-merge architecture for memory-efficient and high-throughput large-scale string matching (LSSM). Our proposed architecture partitions the (8-bit) charac...
Yi-Hua Edward Yang, Viktor K. Prasanna
FPGA
2010
ACM
276views FPGA» more  FPGA 2010»
14 years 4 months ago
Accelerating Monte Carlo based SSTA using FPGA
Monte Carlo based SSTA serves as the golden standard against alternative SSTA algorithms, but it is seldom used in practice due to its high computation time. In this paper, we acc...
Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, K...
MICRO
2003
IEEE
166views Hardware» more  MICRO 2003»
14 years 1 months ago
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pa...