79 search results - page 6 / 16 » Place and Route for Secure Standard Cell Design |
DAC
2004
ACM
14 years 7 months ago
2004
ACM
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
CHES
2006
Springer
13 years 10 months ago
2006
Springer
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
EUROSSC
2007
Springer
14 years 26 days ago
2007
Springer
Abstract. We present the design, prototype implementation, and evaluation of CenceMe, a personal sensing system that enables members of social networks to share their sensing prese...
FPGA
2003
ACM
13 years 12 months ago
2003
ACM
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
CHES
2003
Springer
13 years 10 months ago
2003
Springer
Abstract. Performance evaluation of the Advanced Encryption Standard candidates has led to intensive study of both hardware and software implementations. However, although plentifu...