Sciweavers

    351 search results - page 47 / 71
    » Plug-and-Play Architectural Design and Verification
    Sort
    View
    FMSD
    2006
    83views more  FMSD 2006»
    A Framework for Modeling the Distributed Deployment of Synchronous Designs
    13 years 6 months ago
    A Framework for Modeling the Distributed Deployment of Synchronous Designs
    Download  www.cs.columbia.edu
    Synchronous specifications are appealing in the design of large scale hardware and software systems because of their properties that facilitate verification and synthesis. When the...
    Luca P. Carloni, Alberto L. Sangiovanni-Vincentell...
    claim paper
    Read More »
    DAC
    2006
    ACM
    100views Computer Architecture» more  DAC 2006»
    A parallelized way to provide data encryption and integrity checking on a processor-memory bus
    14 years 7 months ago
    A parallelized way to provide data encryption and integrity checking on a processor-memory bus
    Download  www.lirmm.fr
    This paper describes a novel engine, called PE-ICE (Parallelized Encryption and Integrity Checking Engine), enabling to guarantee confidentiality and integrity of data exchanged b...
    Reouven Elbaz, Lionel Torres, Gilles Sassatelli, P...
    claim paper
    Read More »
    SBCCI
    2005
    ACM
    185views VLSI» more  SBCCI 2005»
    Automatic generation of test sets for SBST of microprocessor IP cores
    14 years 10 days ago
    Automatic generation of test sets for SBST of microprocessor IP cores
    Download  www.cad.polito.it
    Higher integration densities, smaller feature lengths, and other technology advances, as well as architectural evolution, have made microprocessor cores exceptionally complex. Cur...
    Ernesto Sánchez, Matteo Sonza Reorda, Giova...
    claim paper
    Read More »
    DAC
    2011
    ACM
    176views Computer Architecture» more  DAC 2011»
    Image quality aware metrics for performance specification of ADC array in 3D CMOS imagers
    12 years 6 months ago
    Image quality aware metrics for performance specification of ADC array in 3D CMOS imagers
    Download  cadlab.ece.ucsb.edu
    A three-dimensional (3D) CMOS imager constructed from stacking a pixel array of image sensors, an analog-to-digital converter (ADC) array, and an image signal processor (ISP) arra...
    Hsiu-Ming Chang, Kwang-Ting (Tim) Cheng
    claim paper
    Read More »
    TC
    2008
    85views Information Technology» more  TC 2008»
    Implementing Synchronous Models on Loosely Time Triggered Architectures
    13 years 6 months ago
    Implementing Synchronous Models on Loosely Time Triggered Architectures
    Download  www.irisa.fr
    Synchronous systems offer clean semantics and an easy verification path at the expense of often inefficient implementations. Capturing design specifications as synchronous models a...
    Stavros Tripakis, Claudio Pinello, Albert Benvenis...
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.