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CGO
2007
IEEE
14 years 1 months ago
Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors
Dynamic predication has been proposed to reduce the branch misprediction penalty due to hard-to-predict branch instructions. A recently proposed dynamic predication architecture, ...
Hyesoon Kim, José A. Joao, Onur Mutlu, Yale...
CODES
2007
IEEE
14 years 1 months ago
Influence of procedure cloning on WCET prediction
For the worst-case execution time (WCET) analysis, especially loops are an inherent source of unpredictability and loss of precision. This is caused by the difficulty to obtain sa...
Paul Lokuciejewski, Heiko Falk, Martin Schwarzer, ...
CODES
2009
IEEE
14 years 1 months ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
CODES
2004
IEEE
14 years 29 days ago
Fast exploration of bus-based on-chip communication architectures
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
CODES
2004
IEEE
14 years 29 days ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
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