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» Power Estimation in Sequential Circuits
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ICCAD
1996
IEEE
140views Hardware» more  ICCAD 1996»
14 years 6 days ago
Register-transfer level estimation techniques for switching activity and power consumption
We present techniques for estimating switching activity and power consumption in register-transfer level (RTL) circuits. Previous work on this topic has ignored the presence of gl...
Anand Raghunathan, Sujit Dey, Niraj K. Jha
ISCAS
1995
IEEE
107views Hardware» more  ISCAS 1995»
13 years 11 months ago
Power Dissipation in Deep Submicron CMOS Digital Circuits
— This paper introduces a simple analytical model for estimating standby and switching power dissipation in deep submicron CMOS digital circuits. The model is based on Berkeley S...
R. X. Gu, Mohamed I. Elmasry
DATE
2005
IEEE
154views Hardware» more  DATE 2005»
14 years 1 months ago
Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and method...
Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi,...
FPL
2008
Springer
98views Hardware» more  FPL 2008»
13 years 9 months ago
Rapid estimation of power consumption for hybrid FPGAs
A hybrid FPGA consists of island-style fine-grained units and domain-specific coarse-grained units. This paper describes an approach to estimate the power consumption of a set of ...
Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Ste...
NIPS
2004
13 years 9 months ago
Methods for Estimating the Computational Power and Generalization Capability of Neural Microcircuits
What makes a neural microcircuit computationally powerful? Or more precisely, which measurable quantities could explain why one microcircuit C is better suited for a particular fa...
Wolfgang Maass, Robert A. Legenstein, Nils Bertsch...