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» Power Estimation in Sequential Circuits
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DAC
2009
ACM
14 years 21 days ago
GPU-based parallelization for fast circuit optimization
The progress of GPU (Graphics Processing Unit) technology opens a new avenue for boosting computing power. This work is an attempt to exploit GPU for accelerating VLSI circuit opt...
Yifang Liu, Jiang Hu
FCCM
2006
IEEE
162views VLSI» more  FCCM 2006»
14 years 2 months ago
Power Visualization, Analysis, and Optimization Tools for FPGAs
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Matthew French, Li Wang, Michael J. Wirthlin
ICCAD
1994
IEEE
139views Hardware» more  ICCAD 1994»
14 years 5 days ago
Switching activity analysis considering spatiotemporal correlations
This work presents techniques for computing the switching activities of all circuit nodes under pseudorandom or biased input sequences and assuming a zero delay mode of operation....
Radu Marculescu, Diana Marculescu, Massoud Pedram
ICCD
2005
IEEE
116views Hardware» more  ICCD 2005»
14 years 5 months ago
Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis
Consideration of pairs of transition in probabilistic simulation allows power estimation for digital circuits in which inertial delays can filter glitches [5]. However, the merit ...
Fei Hu, Vishwani D. Agrawal
ICCD
2006
IEEE
127views Hardware» more  ICCD 2006»
14 years 5 months ago
Power Droop Testing
Circuit activity is a function of input patterns. When circuit activity changes abruptly, it can cause sudden drop or rise in power supply voltage. This change is known as power d...
Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd...