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» Power Estimation in Sequential Circuits
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ICCAD
1995
IEEE
88views Hardware» more  ICCAD 1995»
13 years 11 months ago
Estimation and bounding of energy consumption in burst-mode control circuits
This paper describes two techniques to quantify energy consumption of burst-modeasynchronous(clock-less)controlcircuits. The circuit specifications consideredare extended burst-m...
Peter A. Beerel, Kenneth Y. Yun, Steven M. Nowick,...
SLIP
2009
ACM
14 years 2 months ago
A pre-placement net length estimation technique for mixed-size circuits
An accurate model for pre-placement wire length estimation can be a useful tool during the physical design of integrated circuits. In this paper, an a priori wire length estimatio...
Bahareh Fathi, Laleh Behjat, Logan M. Rakai
VLSID
2007
IEEE
152views VLSI» more  VLSID 2007»
14 years 8 months ago
An Efficient Technique for Leakage Current Estimation in Sub 65nm Scaled CMOS Circuits Based on Loading Effect
With scaling of CMOS technologies, sub-threshold, gate and reverse biased junction band-to-band-tunneling leakage have increased dramatically. Together they account for more than 2...
Ashesh Rastogi, Wei Chen, Alodeep Sanyal, Sandip K...
ICCAD
2004
IEEE
128views Hardware» more  ICCAD 2004»
14 years 4 months ago
Power estimation for cycle-accurate functional descriptions of hardware
— Cycle-accurate functional descriptions (CAFDs) are being widely adopted in integrated circuit (IC) design flows. Power estimation can potentially benefit from the inherent in...
Lin Zhong, Srivaths Ravi, Anand Raghunathan, Niraj...
CODES
2005
IEEE
14 years 1 months ago
A power estimation methodology for systemC transaction level models
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
Nagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan