Sciweavers

111 search results - page 4 / 23
» Power Optimization in Current Mode Circuits
Sort
View
TCAD
2008
120views more  TCAD 2008»
13 years 7 months ago
Charge Recycling in Power-Gated CMOS Circuits
Abstract--Design of a suitable power gating (e.g., multithreshold CMOS or super cutoff CMOS) structure is an important and challenging task in sub-90nm VLSI circuits where leakage ...
Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram
VLSID
2002
IEEE
151views VLSI» more  VLSID 2002»
14 years 8 months ago
Mode Selection and Mode-Dependency Modeling for Power-Aware Embedded Systems
Among the many techniques for system-level power management, it is not currently possible to guarantee timing constraints and have a comprehensive system model at the same time. S...
Dexin Li, Pai H. Chou, Nader Bagherzadeh
TMC
2010
159views more  TMC 2010»
13 years 6 months ago
Radio Sleep Mode Optimization in Wireless Sensor Networks
—Energy-efficiency is a central challenge in sensor networks, and the radio is a major contributor to overall energy node consumption. Current energy-efficient MAC protocols fo...
Raja Jurdak, Antonio G. Ruzzelli, Gregory M. P. O'...
DAC
1998
ACM
14 years 3 days ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
DFT
1999
IEEE
131views VLSI» more  DFT 1999»
14 years 5 days ago
Optimal Vector Selection for Low Power BIST
In the last decade, researchers have devoted increasing efforts to reduce the average power consumption in VLSI systems during normal operation mode, while power consumption durin...
Fulvio Corno, Matteo Sonza Reorda, Maurizio Rebaud...