Abstract--Design of a suitable power gating (e.g., multithreshold CMOS or super cutoff CMOS) structure is an important and challenging task in sub-90nm VLSI circuits where leakage ...
Among the many techniques for system-level power management, it is not currently possible to guarantee timing constraints and have a comprehensive system model at the same time. S...
—Energy-efficiency is a central challenge in sensor networks, and the radio is a major contributor to overall energy node consumption. Current energy-efficient MAC protocols fo...
Raja Jurdak, Antonio G. Ruzzelli, Gregory M. P. O'...
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
In the last decade, researchers have devoted increasing efforts to reduce the average power consumption in VLSI systems during normal operation mode, while power consumption durin...