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VLSID
2007
IEEE
153views VLSI» more  VLSID 2007»
14 years 10 months ago
Extracting Logic Circuit Structure from Conjunctive Normal Form Descriptions
Boolean Satisfiability is seeing increasing use as a decision procedure in Electronic Design Automation (EDA) and other domains. Most applications encode their domain specific cons...
Zhaohui Fu, Sharad Malik
DAC
1998
ACM
14 years 11 months ago
Exact Tree-based FPGA Technology Mapping for Logic Blocks with Independent LUTs
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...
Madhukar R. Korupolu, K. K. Lee, D. F. Wong
CODES
2004
IEEE
14 years 1 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
ICFP
2010
ACM
13 years 10 months ago
Lolliproc: to concurrency from classical linear logic via curry-howard and control
While many type systems based on the intuitionistic fragment of linear logic have been proposed, applications in programming languages of the full power of linear logic--including...
Karl Mazurak, Steve Zdancewic
DKE
2008
208views more  DKE 2008»
13 years 10 months ago
Deploying defeasible logic rule bases for the semantic web
Logic is currently the target of the majority of the upcoming efforts towards the realization of the Semantic Web vision, namely making the content of the Web accessible not only t...
Efstratios Kontopoulos, Nick Bassiliades, Grigoris...