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» Power Optimized Combinational Logic Design
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ATS
2005
IEEE
164views Hardware» more  ATS 2005»
14 years 1 days ago
A Family of Logical Fault Models for Reversible Circuits
Reversibility is of interest in achieving extremely low power dissipation; it is also an inherent design requirement of quantum computation. Logical fault models for conventional ...
Ilia Polian, Thomas Fiehn, Bernd Becker, John P. H...
ICCAD
1995
IEEE
114views Hardware» more  ICCAD 1995»
14 years 1 months ago
Sequential synthesis using S1S
Abstract—We propose the use of the logic S1S as a mathematical framework for studying the synthesis of sequential designs. We will show that this leads to simple and mathematical...
Adnan Aziz, Felice Balarin, Robert K. Brayton, Alb...
CORR
2011
Springer
179views Education» more  CORR 2011»
13 years 5 months ago
An overview of Ciao and its design philosophy
We provide an overall description of the Ciao multiparadigm programming system emphasizing some of the novel aspects and motivations behind its design and implementation. An impor...
Manuel V. Hermenegildo, Francisco Bueno, Manuel Ca...
DAC
2006
ACM
14 years 11 months ago
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Ruten...
NIPS
2008
13 years 11 months ago
Bayesian Experimental Design of Magnetic Resonance Imaging Sequences
We show how improved sequences for magnetic resonance imaging can be found through optimization of Bayesian design scores. Combining approximate Bayesian inference and natural ima...
Matthias W. Seeger, Hannes Nickisch, Rolf Pohmann,...