430 search results - page 7 / 86 » Power Optimized Combinational Logic Design |
GECCO
2009
Springer
14 years 9 days ago
2009
Springer
A non-uniform cellular automata-based model is presented for the evolutionary development of digital circuits at the gate level. The main feature of this model is the modified lo...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper describes a novel design methodology to implement a secure DPA resistant crypto processor. The methodology is suitable for integration in a common automated standard ce...
GLOBECOM
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract— This paper investigates the joint design and optimization of the power control and beamforming codebooks for the single-user multiple-input single-output (MISO) wireles...
ISLPED
2004
ACM
14 years 1 months ago
2004
ACM
In this paper we investigate the statistics of multiplier operands and identify two characteristics of their distribution that have important consequences for the design of low po...
FPGA
2004
ACM
14 years 1 months ago
2004
ACM
We consider active leakage power dissipation in FPGAs and present a “no cost” approach for active leakage reduction. It is well-known that the leakage power consumed by a digi...