1850 search results - page 47 / 370 » Power and performance optimization at the system level |
144
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ICCD
2006
IEEE
16 years 29 days ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
152
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EMSOFT
2004
Springer
15 years 9 months ago
2004
Springer
Basic retiming is an algorithm originally developed for hardware optimization. Software pipelining is a technique proposed to increase instruction-level parallelism for parallel p...
139
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AVSS
2006
IEEE
15 years 10 months ago
2006
IEEE
We consider the problem of optimal power scheduling for the decentralized detection of a deterministic signal in an inhomogeneous wireless sensor network. The observation noise at...
149
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ISLPED
2005
ACM
15 years 9 months ago
2005
ACM
This work first presents an analytical repeater insertion method which optimizes power under delay constraint for a single net. This method finds the optimal repeater insertion ...
119
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FPL
2005
Springer
15 years 9 months ago
2005
Springer
This article presents a power estimation tool integrated with an FPGA design flow. It is able to estimate total and individual-node average power consumption for combinational blo...