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VTC
2006
IEEE
134views Communications» more  VTC 2006»
14 years 1 months ago
Efficient Algorithms for PAPR Reduction in OFDM Transmitters Implemented using Fixed-Point DSPs
OFDM has a very high peak-to-average power ratio. This imposes stringent dynamic range requirements on the analog front-ends of the transmitter and receiver and, if a fixedpoint pr...
Brendon J. C. Schmidt, Chi Ng, Patrick Yien, Chris...
VLSID
2006
IEEE
119views VLSI» more  VLSID 2006»
14 years 8 months ago
Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core
Performance of applications can be boosted by executing application-specific Instruction Set Extensions (ISEs) on a specialized hardware coupled with a processor core. Many commer...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...
ISLPED
2000
ACM
107views Hardware» more  ISLPED 2000»
13 years 12 months ago
Low power mixed analog-digital signal processing
The power consumption of mixed-signal systems featured by an analog front-end, a digital back-end, and with signal processing tasks that can be computed with multiplications and a...
Mattias Duppils, Christer Svensson
DAC
2005
ACM
13 years 9 months ago
Sign bit reduction encoding for low power applications
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
M. Saneei, Ali Afzali-Kusha, Zainalabedin Navabi
FPGA
2004
ACM
117views FPGA» more  FPGA 2004»
14 years 28 days ago
A magnetoelectronic macrocell employing reconfigurable threshold logic
In this paper, we introduce a reconfigurable fabric based around a new class of circuit element: the hybrid Hall effect (HHE) magnetoelectronic device. Because they incorporate a ...
Steve Ferrera, Nicholas P. Carter