732 search results - page 21 / 147 » Power minimization using control generated clocks |
ISQED
2005
IEEE
14 years 2 months ago
2005
IEEE
Limited Switch Dynamic Logic (LSDL), a high performance logic circuit, has been modified by introducing a pseudo-nMOS style load. The resultant circuit consumes less power, primar...
HPCA
2001
IEEE
14 years 9 months ago
2001
IEEE
With the increasing clock rate and transistor count of today's microprocessors, power dissipation is becoming a critical component of system design complexity. Thermal and po...
INTEGRATION
2008
13 years 9 months ago
2008
Thermal gradients across the die are becoming increasingly prominent as we scale further down into the sub-nanometer regime. While temperature was never a primary concern, its non...
CODES
2010
IEEE
13 years 6 months ago
2010
IEEE
This paper describes PowerBooter, an automated power model construction technique that uses built-in battery voltage sensors and knowledge of battery discharge behavior to monitor...
ASPDAC
2007
ACM
14 years 27 days ago
2007
ACM
Multiple supply voltage (MSV) is one of the most effective schemes to achieve low power, but most works are based on logic level. A few recent works are based on physical level but...