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» Power scalable processing using distributed arithmetic
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IMC
2004
ACM
14 years 3 months ago
Introducing scalability in network measurement: toward 10 Gbps with commodity hardware
The capacity of today's network links, along with the heterogeneity of their traffic, is rapidly growing, more than the workstation’s processing power. This makes the task ...
Loris Degioanni, Gianluca Varenni
ISLPED
2007
ACM
96views Hardware» more  ISLPED 2007»
13 years 11 months ago
Low-power process-variation tolerant arithmetic units using input-based elastic clocking
In this paper we propose a design methodology for low-power, high-performance, process-variation tolerant architecture for arithmetic units. The novelty of our approach lies in th...
Debabrata Mohapatra, Georgios Karakonstantis, Kaus...
WECWIS
2000
IEEE
155views ECommerce» more  WECWIS 2000»
14 years 2 months ago
Distributed and Scalable XML Document Processing Architecture for E-Commerce Systems
XML has become a very important emerging standard for E-commerce because of its flexibility and universality. Many software designers are actively developing new systems to handle...
David Wai-Lok Cheung, Sau Dan Lee, Thomas Lee, Wil...
ISCA
2005
IEEE
166views Hardware» more  ISCA 2005»
14 years 3 months ago
Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
Emil Talpes, Diana Marculescu
ICIP
2009
IEEE
14 years 10 months ago
A High Throughput Cabac Algorithm Using Syntax Element Partitioning
Enabling parallel processing is becoming increasingly necessary for video decoding as performance requirements continue to rise due to growing resolution and frame rate demands. I...