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ISCAS
2007
IEEE
80views Hardware» more  ISCAS 2007»
14 years 1 months ago
An I/Q Channel Time-Interleaved Band-Pass Sigma-Delta Modulator for a Low-IF Receiver
—This paper proposes a multiplexing scheme to realize an I/Q channel time-interleaved (TI) band-pass sigmadelta modulator (BPSDM) that shares OTAs to minimize power consumption a...
Minho Kwon, Gunhee Han
ICC
2008
IEEE
14 years 1 months ago
DS-CDMA Chip Waveforms with Maximally Concentrated Spectra
Abstract—We propose chip waveforms for essentially fullresponse signaling in DS-CDMA systems that employ offset quadrature modulation formats. The waveforms are optimal in the se...
Ritesh Sood, Hong Xiao
ISLPED
2003
ACM
149views Hardware» more  ISLPED 2003»
14 years 20 days ago
Elements of low power design for integrated systems
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative ...
Sung-Mo Kang
DATE
2007
IEEE
109views Hardware» more  DATE 2007»
14 years 1 months ago
System level clock tree synthesis for power optimization
The clock tree is the interconnect net on Systems-on-Chip (SoCs) with the heaviest load and consumes up to 40% of the overall power budget. Substantial savings of the overall powe...
Saif Ali Butt, Stefan Schmermbeck, Jurij Rosenthal...
DAC
2007
ACM
14 years 8 months ago
Voltage-Frequency Island Partitioning for GALS-based Networks-on-Chip
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single gl...
Ümit Y. Ogras, Diana Marculescu, Puru Choudha...