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VLSID
2002
IEEE
128views VLSI» more  VLSID 2002»
14 years 7 months ago
System-Level Point-to-Point Communication Synthesis using Floorplanning Information
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
Jingcao Hu, Yangdong Deng, Radu Marculescu
SBCCI
2004
ACM
117views VLSI» more  SBCCI 2004»
14 years 25 days ago
Reducing test time with processor reuse in network-on-chip based systems
This paper proposes a test planning method capable of reusing available processors as test sources and sinks, and the on-chip network as the access mechanism for the test of cores...
Alexandre M. Amory, Érika F. Cota, Marcelo ...
IPPS
2009
IEEE
14 years 2 months ago
Understanding the design trade-offs among current multicore systems for numerical computations
In this paper, we empirically evaluate fundamental design trade-offs among the most recent multicore processors and accelerator technologies. Our primary aim is to aid application...
Seunghwa Kang, David A. Bader, Richard W. Vuduc
APCCAS
2006
IEEE
258views Hardware» more  APCCAS 2006»
14 years 1 months ago
A 12-bit CMOS Current Steering D/A Converter for Embedded Systems
Abstract - This paper describes the design of a 12-bit digital-to-analog converter for a wireline modem chip implemented in a 0.13tm digital CMOS technology. Transistor-level simul...
Jesús Ruiz-Amaya, Manuel Delgado-Restituto,...
ISCA
2008
IEEE
130views Hardware» more  ISCA 2008»
14 years 1 months ago
Corona: System Implications of Emerging Nanophotonic Technology
We expect that many-core microprocessors will push performance per chip from the 10 gigaflop to the 10 teraflop range in the coming decade. To support this increased performance...
Dana Vantrease, Robert Schreiber, Matteo Monchiero...