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» Power system on a chip (PSoC)
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PLDI
2011
ACM
12 years 10 months ago
Caisson: a hardware description language for secure information flow
Information flow is an important security property that must be incorporated from the ground up, including at hardware design time, to provide a formal basis for a system’s roo...
Xun Li 0001, Mohit Tiwari, Jason Oberg, Vineeth Ka...
IPPS
2009
IEEE
14 years 2 months ago
Dynamic iterations for the solution of ordinary differential equations on multicore processors
In the past few years, there has been a trend of providing increased computing power through greater number of cores on a chip, rather than through higher clock speeds. In order t...
Yanan Yu, Ashok Srinivasan
DAC
2006
ACM
14 years 8 months ago
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...
DATE
2008
IEEE
130views Hardware» more  DATE 2008»
14 years 1 months ago
Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs
—Increasing integrated circuit (IC) power densities and temperatures may hamper multiprocessor system-on-chip (MPSoC) use in hard real-time systems. This article formalizes the t...
Thidapat Chantem, Robert P. Dick, Xiaobo Sharon Hu
CODES
2007
IEEE
14 years 1 months ago
Performance analysis and design space exploration for high-end biomedical applications: challenges and solutions
High-end biomedical applications are a good target for specificpurpose system-on-chip (SoC) implementations. Human heart electrocardiogram (ECG) real-time monitoring and analysis ...
Iyad Al Khatib, Davide Bertozzi, Axel Jantsch, Luc...