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» Power-aware issue queue design for speculative instructions
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DAC
2003
ACM
14 years 8 months ago
Power-aware issue queue design for speculative instructions
Speculatively issued instructions may be particularly sensitive to increases in pipeline depth. Our results indicate that as pipeline depth increases, speculation increases the pe...
Tali Moreshet, R. Iris Bahar
HIPC
2003
Springer
14 years 19 days ago
Power-Aware Adaptive Issue Queue and Register File
In this paper, we present a novel technique to reduce dynamic and static power dissipation in the issue queue. The proposed scheme is based on delaying the dispatch of instructions...
Jaume Abella, Antonio González
HIPEAC
2007
Springer
14 years 1 months ago
Fetch Gating Control Through Speculative Instruction Window Weighting
In a dynamic reordering superscalar processor, the front-end fetches instructions and places them in the issue queue. Instructions are then issued by the back-end execution core. T...
Hans Vandierendonck, André Seznec
HPCA
2003
IEEE
14 years 7 months ago
Power-Aware Control Speculation through Selective Throttling
With the constant advances in technology that lead to the increasing of the transistor count and processor frequency, power dissipation is becoming one of the major issues in high...
Juan L. Aragón, José González...
ICCD
2005
IEEE
109views Hardware» more  ICCD 2005»
14 years 4 months ago
Reducing the Energy of Speculative Instruction Schedulers
Energy dissipation from the issue queue and register file constitutes a large portion of the overall energy budget of an aggressive dynamically scheduled microprocessor. We propo...
Yongxiang Liu, Gokhan Memik, Glenn Reinman