21 search results - page 1 / 5 » Power-driven Design of Router Microarchitectures in On-chip ... |
SBACPAD
2007
IEEE
14 years 5 months ago
2007
IEEE
In this paper, an adaptive wormhole router for a flexible on-chip interconnection network is proposed and implemented for a Chip-Multi Processor (CMP). It adopts a wormhole switc...
ISCA
2006
IEEE
13 years 11 months ago
2006
IEEE
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
TC
2008
13 years 10 months ago
2008
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
TC
2010
13 years 9 months ago
2010
—Switched networks have been adopted in on-chip communication for their scalability and efficient resource sharing. However, using a general network for a specific domain may res...
ISCA
2008
IEEE
14 years 5 months ago
2008
IEEE
Current state-of-the-art on-chip networks provide efficiency, high throughput, and low latency for one-to-one (unicast) traffic. The presence of one-to-many (multicast) or one-t...